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Silicon Packaging Engineering Manager

Intel2h ago
United StatesOnsiteFull-timeManager Level6+ yrs exp
H-1B verified · 239 LCAs

Top focus

Engineering ManagerVp EngineeringSenior Engineering Manager

Job Description

Intel Foundry is seeking a highly experienced IC Packaging Design Manager to lead the delivery of advanced packaging solutions within the Advanced Design and Customer Engineering (ADCE) organization. You will lead a team responsible for driving package design execution to ensure first-pass success across customer programs.

In this role, you will act as a trusted technical partner to customers, enabling successful adoption of Intel's advanced packaging technologies (EMIB, Foveros, chiplet architectures). This position requires technical depth, and leadership across all aspects of advanced packaging design

Key Responsibilities

  • Leadership and Management Lead and manage a group of IC Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.
  • Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.
  • Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.
  • Lead design groups, coordinating efforts across multiple teams to achieve project goals.
  • Technical Expertise Serve as the primary package design technical lead and guide customers through end-to-end package design flow Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.
  • Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers
  • integration teams to define and implement design specifications.
  • Leverage extensive experience in advanced packaging designs to meet design KPIs.
  • Ensure products are designed and developed with high quality standards by overseeing design processes, risk management
  • compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.
  • Project Management Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.
  • Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.
  • Conduct regular project reviews and provide status updates to senior management.
  • Innovation and Improvement Identify and implement process improvements to enhance the efficiency and quality of package designs and development.
  • Stay current with industry trends and emerging technologies, incorporating new methodologies and tools into the design process.
  • Drive innovation in product design, exploring new approaches and techniques to achieve competitive advantages

Qualifications

  • Minimum qualifications are required to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications

  • Bachelor's degree in Electrical Engineering or STEM related field with 9+ years of relevant experience OR - Master's degree in Electrical Engineering or STEM related field with 6+ years of relevant experience OR - PhD in Electrical Engineering or STEM related field with 4+ years of relevant experience Relevant experience should include the following: Experience in IC Package, chiplet/SOC design
  • heterogenous integration, with at least 3 years in a leadership role.
  • Proven experience in a leadership or management role, with a track record of successfully leading engineering teams and delivering complex projects within established timelines.
  • Experience in performance/manufacturability/yield aware design methodologies Experience with design flows and methodologies (physical design, analysis, verification).
  • Experience working with IC Packaging EDA tools from Siemens and/or Cadence.
  • Experience with packaging technologies and heterogenous integration Preferred Qualifications Experience with IC Packaging designs for HPC/AI class of products Join Intel and contribute to shaping the future of technology.
  • Be a part of a dynamic team committed to delivering innovative solutions that address the needs of a rapidly evolving world.
  • Apply today to take the next step in your career.
  • Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
  • We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.
  • Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures
  • assembly/test packages the compute devices to improve the lives of every person on Earth.
  • Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation
  • any other characteristic protected by local law, regulation
  • Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry.
  • It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel .
  • Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
  • Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
  • Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
  • Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.
  • We do not charge any fees during our hiring process.
  • Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.
  • If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Required skills

Electrical EngineeringIC PackagechipletSOC designheterogenous integrationleadershipdesign methodologiesEDA toolsSiemensCadence
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