Design Engineer – AI SoC Development
Intel•21h ago
United StatesHybrid$164.5K–$232.2KFull-timeMid Level4+ yrs exp
H-1B verified · 239 LCAs
Top focus
Design Systems
Job Description
- Join Intel's AI Revolution Intel's AI SoC organization develops cutting-edge products powering a wide range of AI applications, from edge devices to data center accelerators. If you are an engineer with strong technical and communication skills who thrives in a fast-paced environment with abundant learning opportunities, you are the ideal candidate for this role. Join us to shape the future of AI hardware. What You'll Do As an RTL Design Engineer, you'll develop logic design, register transfer level (RTL) coding
- simulation for SoC designs, integrating IP blocks and subsystems into full chip SoC or discrete component designs. You'll participate in defining architecture and microarchitecture features while performing quality checks across various logic design aspects from RTL to timing/power convergence. You'll apply strategies, tools
- methods to write RTL and optimize logic to meet power, performance, area
- timing goals while ensuring design integrity for physical implementation. Working closely with verification teams, you'll review verification plans and resolve failing RTL tests to ensure feature correctness. You'll follow secure development practices and collaborate with IP providers for SoC-level integration and validation. Key Responsibilities Architecture & Design
- Contribute to evaluation of architectural trade-offs considering features, performance, and system constraints
- Implement RTL in Verilog/System Verilog based on defined micro-architecture
- Integrate IP blocks at top level and ensure synthesis- and timing-clean design Verification & Validation
- Work closely with verification teams to achieve full coverage and robust validation
- Develop timing constraints for IP blocks and assist physical design teams with synthesis, timing closure, and formal equivalence checks
- Support silicon bring-up and post-silicon validation activities, including debug and performance analysis Collaboration & Quality
- Collaborate with senior engineers to adopt best practices and improve design methodologies
- Drive quality assurance compliance for smooth IP/SoC handoff
- Work with IP providers to integrate and validate IPs at the SoC level The ideal candidate should also demonstrate Ability to work in a dynamic environment and adapt to changing requirements Strong problem-solving skills, collaborative mindset
- eagerness to learn Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering
- Computer Science 4+ years of experience in/with: RTL design and implementation for ASIC/SoC development Proficiency in Verilog/System Verilog for RTL coding and design Experience with synthesis tools and timing closure methodologies Preferred Qualifications Understanding of clock domain crossings, power optimization
- timing closure Exposure to SoC system integration and CPU subsystem design Familiarity with standard bus protocols (AXI, AHB, etc.) and embedded processor architectures Knowledge of high-speed and low-power design techniques Experience with static timing analysis (STA) tools and methodologies Hands-on experience with formal verification tools and techniques Basic scripting skills (Python, TCL, etc.) for automation Experience with EDA tools: HDL simulators (VCS, Questa, IES), lint tools (Spyglass)
- FPGA prototyping tools Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group: Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society
- for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions
- the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers
- society. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation
- any other characteristic protected by local law, regulation
- ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses
- benefit programs which include health, retirement
- vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience
- relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees
- any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Required skills
RTL designVerilogSystem Verilogsynthesis toolstiming closureclock domain crossingspower optimizationSoC integrationAXIAHBstatic timing analysisformal verificationPythonTCLEDA tools