MTS, AI Optimized Memory Digital Design Engineer

Responsibilities

• Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon Design, implement
• review SystemVerilog RTL for advanced memory system architectures Perform synthesis and early PPA analysis to optimize area, power
• timing Develop and maintain microarchitecture documentation that aligns design intent across teams Evaluate architectural and implementation tradeoffs to support technical decision-making Minimum Qualifications: Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering
• a related technical field Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs Experience with synthesis flows and early PPA estimation and optimization Proficiency in SystemVerilog and at least one programming language such as C, C++
• Python Preferred Qualifications: Master’s or PhD in Computer Science, Computer Engineering, Electrical Engineering
• equivalent experience 5+ years of industry experience delivering silicon-proven memory systems or SoC hardware designs on modern process nodes Familiarity with memory interfaces, reliability features
• media management concepts Experience influencing architecture features with a strong understanding of RTL implementation cost and feasibility Experience working with Agentic AI tools to assist with design and verification The US base salary range that Micron Technology estimates it could pay for this full-time position is: $175,000.00 - $309,000.00 a year Additional compensation may include benefits, bonuses and equity.
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