Principal Silicon Design Verification Engineer

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions.

Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt.

Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance.

To achieve this goal, the Silicon IP and Custom Products ( SCIPS ) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.

We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Silicon Design Verification Engineer to join the team.

Responsibilities Own the development of C and C++ based test content at the subsystem and SoC levels, including bare-metal bring-up code, directed and constrained-random test sequences, and self-checking tests that exercise complex multi-IP flows such as secure boot, key and fuse management, and processor and bus interactions.

Build and maintain the C test infrastructure that the broader team relies on, including startup code, low-level drivers, register access layers, and the build flow (Makefiles, linker scripts, and toolchain setup) needed to compile and run firmware-style tests against the design.

Own the pre-silicon verification strategy and execution for one or more security IP blocks and subsystems and their integration into the SoC, covering test planning, environment architecture, and signoff criteria from early design through tapeout and silicon bring-up.

Architect and extend SystemVerilog and UVM environments that host C-based stimulus, connecting embedded test code to the testbench so processor-driven and stimulus-driven scenarios run together. Drive coverage signoff across functional, code, and power-aware coverage.

Set goals, investigate and close gaps without unjustified exclusions, and apply constrained-random, formal, and gate-level techniques to find bugs and prove test plan completeness. Act as verification lead and technical point of contact for customer and partner teams, owning milestone delivery at both the IP and SoC levels, keeping releases on schedule.

Mentor and guide less experienced engineers by reviewing test plans, C and SystemVerilog code, debug work, onboarding new team members, and establishing verification best practices the broader team can reuse. Improve verification efficiency by building reference and prediction models, automation, and debug tooling in Python and other scripting languages, and by correlating pre-silicon C test results with FPGA prototyping platforms to accelerate firmware bring-up and post-silicon validation.

Qualifications Required/minimum qualifications Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.

Other Qualifications: Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.

As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.

To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable