Sr. Member Technical Staff - ESD and Latch-Up - HBM

Responsibilities

• Define end-to-end ESD and latch-up architecture across base die, DRAM die
• interconnects Develop protection strategies for high-speed I/O, TSV interfaces
• advanced packaging Establish ESD/LUP standards, rule decks
• signoff criteria Drive correlation between design assumptions, silicon validation
• field reliability Partner with foundry and packaging teams on system-level ESD challenges Minimum Qualifications: MS or PhD in Electrical Engineering or related field
• equivalent practical experience 10+ years of experience in ESD and latch-up design and reliability Expertise in advanced CMOS technologies such as FinFET or GAA Experience with 3D IC, TSV
• die-to-die interfaces Preferred Qualifications: Experience defining architecture across multi-die or stacked memory systems Background in ESD device or circuit design Experience developing PDK collateral or ESD rule decks Experience debugging silicon failures related to ESD or latch-up Demonstrated technical leadership across cross-functional teams The US base salary range that Micron Technology estimates it could pay for this full-time position is: $177,000.00 - $334,000.00 a year Additional compensation may include benefits, bonuses and equity.
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