Senior PCB Layout Engineer

Senior PCB Layout Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.

We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next.

We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.

Open up opportunities with HPE

Senior PCB Layout Engineer A Senior PCB Layout Engineer is a technical expert responsible for designing complex, high-speed printed circuit boards using the Cadence Design Systems Allegro PCB Designer platform. This role focuses on advanced constraint-driven layout, signal integrity awareness, manufacturing readiness, and automation (often with SKILL), while leading critical hardware projects.

Role Summary Design and deliver high-performance, multi-layer PCBs for complex electronic systems such as networking equipment, servers, telecom hardware, aerospace systems, or high-speed embedded platforms. The engineer works closely with hardware, SI/PI, mechanical, and manufacturing teams to ensure first-pass success and production readiness.

Key Responsibilities Advanced PCB Layout Design complex boards (12–40+ layers) using Cadence Allegro PCB Designer Perform optimized component placement for: High-speed digital Power distribution Thermal performance EMI control Route critical interfaces: DDR4/DDR5 PCIe Gen4/Gen5+ USB 3.x / Type-C Ethernet (10G–112G SerDes) Implement: Differential pair routing and tuning Length and phase matching Controlled impedance structures Constraint & Stackup Management Define and manage rules using Constraint Manager Develop stackups with controlled impedance and fabrication feasibility Work with PCB vendors to validate materials, via structures, and HDI capability Signal Integrity & Power Integrity Awareness Apply SI/PI best practices: Return path continuity Crosstalk reduction Proper decoupling strategy Collaborate with SI/PI teams Implement simulation-driven layout changes HDI and Advanced Technologies Blind/buried vias and microvias BGA escape for high pin-count devices Backdrilling for high-speed signals High-current and low-noise power routing Manufacturing & NPI Support Generate fabrication and assembly outputs: ODB++, IPC-2581, Gerber Drill files, drawings, stackup documentation Perform DFM/DFA reviews with vendors Support prototype builds and resolve manufacturing issues Leadership Mentor junior and mid-level PCB designers Lead layout planning and design reviews Estimate schedules and manage multiple projects Required Qualifications 8–15+ years of PCB layout experience Expert proficiency in Cadence Allegro Strong knowledge of: High-speed design techniques Impedance control and stackup planning HDI technologies EMI/EMC fundamentals Solid understanding of PCB fabrication and assembly processes Preferred (High-End Systems) Networking, server, or telecom hardware experience Familiarity with: 25G/56G/112G SerDes Backplane design Thermal/mechanical co-design Experience with SI/PI analysis tools Typical Impact Enables first-pass board success (fewer respins) Supports higher data rates and system reliability Improves team efficiency through automation Serves as the technical authority for PCB layout What We Can Offer You: Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected: Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE. #unitedstates #networking Job: Engineering Job Level: TCP_03 The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 105,500 - 213,500 in California The listed salary range reflects base salary.

Variable incentives may also be offered. Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need.

Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity . Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

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